Vol. 1 No. 4 (2024): Issue Month: September, 2024
Journal Article

Digital Signal Processing For Noise Suppression In Voice Signals

Muthukumaran Vaithianathan
Samsung Semiconductor Inc, San Diego, USA

Published 2024-09-30

Keywords

  • Digital Signal Processing,
  • Noise Suppression,
  • Noise Estimation,
  • Wiener Filtering,
  • Speech Recognition

How to Cite

Muthukumaran Vaithianathan. (2024). Digital Signal Processing For Noise Suppression In Voice Signals. International Journal of Advanced Research and Interdisciplinary Scientific Endeavours, 1(4), 198–208. https://doi.org/10.61359/11.2206-2417

Abstract

In numerous applications that rely on audible voice signals, including speech recognition, audio recording, and telecommunications, the suppression of background noise is an essential component. The present study introduces an innovative methodology for mitigating noise in audio transmission by employing digital signal processing. Preceding post-processing for refinement, it is necessary to estimate and reduce noise in the input speech signals. The successful implementation of the proposed approach requires this. The proposed method incorporates spectral shaping as a post-processing step. Noise estimation is performed using minimal statistics, and spectrum analysis is executed via short-time Fourier transform. The studies' findings indicate that the intelligibility and audibility of communication in chaotic environments are significantly improved by the proposed method. Anthology-perceptual evaluation scores of voice quality, improved signal- to-noise ratios, and decreased word error rates are some objective criteria utilized in quantitative evaluation. Furthermore, subjective hearing tests were employed to authenticate the exceptional quality of the speech signals that were processed. The method that was suggested has demonstrated encouraging outcomes, suggesting that it might be viable to improve the functionality of voice-reliant applications in real-world scenarios. The algorithm implementation is proposed for FPGA and DSP component specific UVM TB verification technique is modelled.